2024

  1. TCAS-I
    [J10]
    NeuroSim V1.4: Extending technology support for digital compute-in-memory towards 1nm node
    Junmo Lee, Anni Lu, Wantong Li, and Shimeng Yu
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2024
  2. J-EDS
    [J9]
    Design and thermal analysis of 2.5D and 3D integrated system of a CMOS image sensor and a sparsity-aware accelerator for autonomous driving
    Janak Sharda, Madison Manley, Ankit Kaul, Wantong Li, Muhammad S. Bakir, and Shimeng Yu
    IEEE Journal of the Electron Devices Society (J-EDS), 2024

2023

  1. TVLSI
    [J8]
    H3DAtten: Heterogeneous 3D integrated hybrid analog and digital compute-in-memory accelerator for vision transformer self-attention
    Wantong Li, Madison Manley, James Read, Ankit Kaul, Muhammad S. Bakir, and Shimeng Yu
    IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2023
  2. DATE
    [C17]
    RAWAtten: Reconfigurable accelerator for window attention in hierarchical vision transformers
    Wantong Li, Yandong Luo, and Shimeng Yu
    ACM/IEEE Design, Automation and Test in Europe (DATE), 2023
  3. BIOCAS
    [C16]
    Enabling ultra-low power ultrasound imaging with compute-in-memory sparse reconstruction accelerator
    Wantong Li, Xitie Zhang, Junmo Lee, F. Levent Degertekin, Shaolan Li, and Shimeng Yu
    IEEE Biomedical Circuits and Systems Conference (BIOCAS), 2023
  4. AICAS
    [C15]
    Optimization strategies for digital compute-in-memory from comparative analysis with systolic array
    Wantong Li, Junmo Lee, and Shimeng Yu
    IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2023
  5. TCAS-I
    [J7]
    Temporal frame filtering for autonomous driving using 3D-stacked global shutter CIS with IWO buffer memory and near-pixel compute
    Janak Sharda*, Wantong Li*, Qiucheng Wu, Shiyu Chang, and Shimeng Yu
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2023
  6. TCAS-I
    [J6]
    ENNA: An efficient neural network accelerator design based on ADC-free compute-in-memory subarrays
    Hongwu Jiang, Shanshi Huang, Wantong Li, and Shimeng Yu
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2023
  7. IEDM
    [C14]
    BEOL compatible oxide power transistors for on-chip voltage conversion in heterogenous 3D (H3D) integrated circuits
    Sunbin Deng, Jungyoun Kwak, Junmo Lee, Khandker Akif Aabrar, Tae-Hyeon Kim, Gihun Choe, Sharadindu Gopal Kirtania, Chengyang Zhang, Wantong Li, Omkar Phadke, Shimeng Yu, and Suman Datta
    IEEE International Electron Devices Meeting (IEDM), 2023
  8. MWSCAS
    [C13]
    A reconfigurable monolithic 3D switched-capacitor DC-DC converter with back-end-of-line oxide channel transistor
    Jungyoun Kwak, Wantong Li, and Shimeng Yu
    IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2023
  9. EDTM
    [C12]
    Thermal modeling of 2.5D integrated package of CMOS image sensor and FPGA for autonomous driving
    Janak Sharda, Madison Manley, Ankit Kaul, Wantong Li, Muhammad S. Bakir, and Shimeng Yu
    IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 2023
  10. ISCAS
    [C11]
    Enabling long-term robustness in RRAM-based compute-in-memory edge devices
    James Read, Wantong Li, and Shimeng Yu
    IEEE International Symposium on Circuits and Systems (ISCAS), 2023
  11. ORSS
    [C10]
    Machine learning algorithm co-design for a 40 nm RRAM analog compute-in-memory accelerator
    Ethan Weinstock, Yiming Tan, Wantong Li, and Shimeng Yu
    IEEE International Opportunity Research Scholars Symposium (ORSS), 2023

2022

  1. JSSC
    [J5]
    A 40nm MLC-RRAM compute-in-memory macro with sparsity control, on-chip write-verify, and temperature-independent ADC references
    Wantong Li, Xiaoyu Sun, Shanshi Huang, Hongwu Jiang, and Shimeng Yu
    IEEE Journal of Solid State Circuits (JSSC), 2022
  2. JETCAS
    [J4]
    MAC-ECC: In-situ error correction and its design methodology for reliable NVM-based compute-in-memory inference engine
    Wantong Li, James Read, Hongwu Jiang, and Shimeng Yu
    IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2022
  3. ESSCIRC
    [C9]
    A 40nm RRAM compute-in-memory macro with parallelism-preserving ECC for iso-accuracy voltage scaling
    Wantong Li, James Read, Hongwu Jiang, and Shimeng Yu
    IEEE European Solid-State Circuits Conference (ESSCIRC), 2022
  4. VLSI
    [C8]
    A 40nm analog-input ADC-free compute-in-memory RRAM macro with pulse-width modulation between sub-arrays
    Hongwu Jiang, Wantong Li, Shanshi Huang, and Shimeng Yu
    IEEE Symposium on VLSI Technology and Circuits (VLSI), 2022
  5. AICAS
    [C7]
    Temporal frame filtering with near-pixel compute for autonomous driving
    Wantong Li, Qiucheng Wu, Janak Sharda, Shiyu Chang, and Shimeng Yu
    IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022
  6. D&T
    [J3]
    Analog-to-digital converter design exploration for compute-in-memory accelerators
    Hongwu Jiang, Wantong Li, Shanshi Huang, Stefan Cosemans, Francky Catthoor, and Shimeng Yu
    IEEE Design & Test, 2022
  7. ISVLSI
    [C6]
    A method for reverse engineering neural network parameters from compute-in-memory accelerators
    James Read, Wantong Li, and Shimeng Yu
    IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022

2021

  1. ESSCIRC
    [C5]
    A 40nm RRAM compute-in-memory macro featuring on-chip write-verify and offset-cancelling ADC references
    Wantong Li, Xiaoyu Sun, Hongwu Jiang, Shanshi Huang, and Shimeng Yu
    IEEE European Solid-State Circuits Conference (ESSCIRC), 2021
  2. CICC
    [C4]
    Secure-RRAM: A 40nm 16kb compute-in-memory macro with reconfigurability, sparsity control, and embedded security
    Wantong Li, Shanshi Huang, Hongwu Jiang, Xiaoyu Sun, and Shimeng Yu
    IEEE Custom Integrated Circuits Conference (CICC), 2021
  3. TVLSI
    [J2]
    Secure XOR-CIM engine: Compute-in-memory SRAM architecture with embedded XOR encryption
    Shanshi Huang, Hongwu Jiang, Xiaochen Peng, Wantong Li, and Shimeng Yu
    IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2021
  4. Frontiers AI
    [J1]
    NeuroSim simulator for compute-in-memory hardware accelerator: Validation and benchmark
    Anni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, and Shimeng Yu
    Frontiers in Artificial Intelligence, 2021
  5. ESSDERC
    [C3]
    Compute-in-memory: From device innovation to 3D system integration
    Shimeng Yu, Wonbo Shim, Jae Hur, Yuan-Chun Luo, Gihun Choe, Wantong Li, Anni Lu, and Xiaochen Peng
    IEEE European Solid-State Device Research Conference (ESSDERC), 2021
  6. AICAS
    [C2]
    NeuroSim validation with 40nm RRAM compute-in-memory macro
    Anni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, and Shimeng Yu
    IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2021

2020

  1. ICCAD
    [C1]
    XOR-CIM: Compute-in-memory SRAM architecture with embedded XOR encryption
    Shanshi Huang, Hongwu Jiang, Xiaochen Peng, Wantong Li, and Shimeng Yu
    ACM/IEEE International Conference on Computer-Aided Design (ICCAD), 2020